Secondary batteries are widely spread from mobile terminals such as cellular phone, notebook computer and so on to electric vehicles, and repeatedly used by charging/discharging. Examples of conventional secondary batteries include a nickel-cadmium battery and a lithium-ion battery, and have a basic structure in which a layer having a charge function is sandwiched between electrodes. The nickel-cadmium battery is a battery using nickel hydroxide as a cathode and cadmium hydroxide as an anode, and the lithium-ion battery uses an oxide containing lithium as a positive electrode and graphite as a negative electrode (refer to Patent Document 1).
In contrast, the present inventors suggest an all-solid type semiconductor battery (hereinafter, referred to as a quantum battery) capable of reduction in cost and safe operation with a simple configuration (PCT/JP 2010-067643). This quantum battery is based on the operation principle of utilizing a photoexcitation structural change of a metal oxide by ultraviolet irradiation to form a new energy level in a band gap, and trapping electrons into the intermediate energy level to perform charge.
In this quantum battery, a metal oxide coated with an insulator is used as a charge layer, and cracks may occur in the electrode due to a difference in thermal expansion coefficient between a base material and the electrode in a baking process by heating when manufacturing the charge layer.
The problem caused from the difference in thermal expansion coefficient between the base material and the electrode also applies to general semiconductor integrated circuits and solar batteries, and therefore various suggestions have conventionally been made.
For example, a photoelectric conversion element and a thin film solar battery are suggested in which to relax the difference in thermal expansion coefficient between the base material and the electrode, a stress relaxation layer is provided on an insulating layer to suppress peeling off of a layer constituting the photoelectric conversion element are suggested. They are structured such that, on a substrate with insulating layer including a metal substrate made by stacking a metal base material and an Al base material into one body and an electric insulating layer formed on the surface of the Al base material of the metal substrate, a stress relaxation layer formed on the electric insulating layer is provided, and a lower electrode formed on the stress relaxation layer, a photoelectric conversion layer formed on the lower electrode and composed of a compound semiconductor layer, and an upper electrode formed on the photoelectric conversion layer are provided (refer to Patent Document 2).
An example utilizing a stress relaxing connecting medium is an example in which a printed wiring board different in thermal expansion coefficient from a land grid array-type package is bonded thereto with high reliability. A land grid array-type semiconductor package having an array-shaped terminal electrode and a printed wiring board having an electrode with the same arrangement as the array-shaped terminal electrode, are electrically connected together through a flexible stress relaxing connecting medium which has a first connecting pad connected to the array-shaped electrode of the land grid array-type package and a second connecting pad connected to the electrode on the printed wiring board. The stress relaxing connecting medium is a flexible sheet, and has a through hole for electrical connection and a cutout at a predetermined portion of the flexible sheet (refer to Patent Document 3).
An example utilizing a stress relaxing slit is an example utilizing a surface mounting type ceramic substrate. It is possible to prevent cracks from occurring at a bonding part intervening between an external connecting electrode and a conductor pattern of a wiring board due to a difference in thermal expansion coefficient between a ceramic substrate main body and the wiring board, and prevent cracks from occurring at the ceramic substrate main body due to a tensile stress generated in the ceramic substrate main body. In the surface mounting type ceramic substrate, a slit for relaxing stress of the bonding part is formed between a portion where the external connecting electrode is provided and a portion where a heat radiating conductor part is provided in the ceramic substrate main body. A portion of the ceramic substrate main body where the tensile stress is concentrated is formed thick to have a thickness dimension larger than that of the portion where the external connecting electrode is provided (refer to Patent Document 4).
Further, in the case where a semiconductor chip is subjected to face down bonding on a circuit board and a glass substrate and electrically and mechanically connected thereto, thermal stress concentrates on a solder after melting a solder bump and a conductive adhesive due to a difference in thermal expansion coefficient between the circuit board, the glass substrate, and the semiconductor chip, so that debonding occurs between the circuit board and the solder and between the glass substrate and the conductive adhesive. Therefore, in Japanese Laid-open Patent Publication No. 2000-260811, many slits are provided in the rear surface of the semiconductor chip to make the semiconductor chip follow a warp of the circuit board and the glass substrate, so as to relax the intrinsic stress caused by the thermal expansion difference occurring in the solder after melting the solder bump, the glass substrate, and the conductive adhesive (refer to Patent Document 5).
Further, in Japanese Laid-open Patent Publication No. 1998-223698, a reinforcing plate provided with slits is suggested to relax and disperse the stress generated by a difference in thermal expansion between a TAB tape reinforcing plate and a mounting board in a Tape-BGA type semiconductor device. The Tape-BGA type semiconductor device is formed such that a signal wiring is formed on a heat resistant insulating resin film such as polyimide or the like, and after the tip part of the signal wiring is electrically connected to the electrode of a semiconductor element, the reinforcing plate formed with a semiconductor element mounting aperture is fixed to the surface of the heat resistant insulating resin film, and then a solder ball is mounted on the outer connection part of the signal wiring. In the Tape-BGA type semiconductor device, a slit part is provided along the aperture of the reinforcing plate (refer to Patent Document 6).